The following error occurs in MAP when the XST option "register_balancing" is enabled andRAMB36 primitive is in the code.
These type of primitives need to have address bit [15] connected to '1' for non-cascading block RAM, otherwise MAP will generate following error message:
ERROR:PhysDesignRules:2378 - Issue with pin connections and/or configuration on block::.
The cascadable BlockRam feature is not used for port A (RAM_EXTENSION_A set to NONE).
The highest order port A address bit (ADDRARDADDRL15) must be tied to LOGIC 1
This happens because "register_balancing/register_ordering" option pipelines the signal to the pin[15] of RAMB36 primitive.
Even though the address is connected by code to a high value, theXST tool reorders the data path as follows:
To work around the issue, use "-keep_hierarchy = soft" in XST or disable "register_balancing" option from the HDL code with the following attribute:
attribute register_balancing of {signal_name |entity_name }: signal|entity} is "no";
AR# 50855 | |
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日期 | 12/21/2012 |
状态 | Active |
Type | 已知问题 |
器件 | |
Tools |