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AR# 5108

FPGA Configuration - What is the status of used I/O for Spartan/Virtex families during configuration?

Description

General Description:

What is the status of used and unused I/O before, during, and after configuration for Spartan?

解决方案

Virtex/-E/-II/-II Pro Spartan-II/-IIE/-3

I/O are 3-stated during configuration; however, for particular designs, IOU may transition during the last frame write of configuration. For more information, refer to (Xilinx Answer 18277) and (Xilinx Answer 18278).

By default, no pullup or pulldown is present on Virtex I/O during configuration. However, preconfiguration pullups may be selected with optional Mode Pin values.

Consult the Virtex data sheets and user guide for more details.

Data sheets:

http://www.support.xilinx.com/xlnx/xweb/xil_publications_index.jsp

User guides:

http://www.support.xilinx.com/xlnx/xweb/xil_publications_index.jsp?category=User+Guides

After configuration of Virtex series FPGAs, the unused I/O are configured with OBUFT_S_12, which is 3-stated with a weak pulldown.

Spartan/-XL

The quoted information below is from the "Pin Description" section of the data sheet at:

http://www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?category=/Data+Sheets/FPGA+Device+Families&iLanguageID=1

"Before and during configuration, all outputs not used for the configuration process are 3-stated with the I/O pull-up resistor network activated. After configuration, if an IOB is unused, it is configured as an input with the I/O pull-up resistor network remaining activated."

"These pins can be configured to be input and/or output after configuration is completed. Before configuration is completed, these pins have internal high-value pull-up resistor network that defines the logic level as High."

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
52539 Zynq-7000 AP SoC - Board Design N/A N/A
AR# 5108
创建日期 08/21/2007
Last Updated 12/15/2012
状态 Active
Type 综合文章