解决方案
Attached to the end of this answer record is a ZIP file (51138.zip) which can be used as a reference to add interrupt support to a CIP generated AXI IP. The HDL, MPD, and PAO files will need to be updated.
In the user HDL code, a simple counter is implemented to generate an interrupt every 15 seconds (depending on the AXI clock):
- Unzip the attached files into a current project directory.
- Place the axi_interrupt_v1_00_a file into the pcores folder.
- Place the XilinxProcessorIPLib file into the drivers folder (create one if it does not already exist).
- Add the axi_interrupt IP to the hardware project in EDK, and tick the C_INTERRUPT_PRESENT box in the Core Configuration in XPS.
- For MicroBlaze designs, the application code assumes the system contains an Interrupt controller. In Zynq SoC, simply select the IRQ under the Zynq tab, and add the AXI_Interrupt to the PS interrupt controller.
For testing purposes, there is an example AXI Interrupt Application for both MicroBlaze and Zynq SoC designs. To use this application:
- Export to SDK.
- Once SDK is open, go to Xilinx Tools -> Repositories and under Local Repositories, point to the drivers folder in the project directory.
- Click Rescan Repositories.
- Select OK to close the GUI.
- To create the BSP, go to File -> New -> Board Support Package.
- To create the application, go to File -> New -> Application Project. Name the application, use the existing Board Support Package, then select Next to continue.
- Select an Empty Application, then Finish to continue.
- Drop down the newly created Application in the Project Explorer view in SDK, and highlight the src folder. Now select File -> New -> Source File. Call it main.c. Select Finish to continue.
- In the 51138.zip, there will be a folder called src, there are two files: mb_main.c and zynq_main.c. Depending on your system, copy the contents of the relevant file to your newly created main.c file
Note: These applications require at least 128KB of memory.
To see how to port this IP, or other CIP created AXI IP to Vivado IP Integrator, see AR56358