The MIG 7 SeriesDesign Assistant will walk you through the recommended design flow for MIG 7 Series while debugging commonly encountered issues, such as simulation issues, calibration failures, and data errors. The Design Assistant will not only provide useful design and troubleshooting information, but also point you to the exact documentation you need to read to help you design efficiently with MIG 7 Series.
NOTE: This answer record is part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.
First, please select the design phase where you have a question or are troubleshooting an issue related to your MIG design. This will ensure the MIG Design Assistant points you to the information you need to continually move forward with your design:
(Xilinx Answer 51675) Core Functionality - Includes Clocking, PHY, Controller, User Interface, Supported Features, and Performance information
(Xilinx Answer 34283) Core Generation - Includes core generation flows, controller options, updating a core, and MIG output files/directories
(Xilinx Answer 51635) Synthesis and Implementation - Includes general ISE/Vivado usage and Error Debug
(Xilinx Answer 51666) Simulation - Includes Simulation Debug, Simulator Support, and Simulation Parameter information
(Xilinx Answer 51315) Hardware - Includes Pin-out and Banking Requirements, Board Layout and Design Guidelines, and Board Debug