AR# 51318


14.2 Project Navigator - Only the "Balanced" design goal is available for Zynq devices in "Design Goals & Strategies"


If targeting Zynq devices in the ISE design tools, only the "Balanced" design goal can be selected in "Design Goals & Strategies".

What is the problem?


The same design goal strategies that are used for Virtex-7 FPGA projects should be available for Zynq device projects as well. However, in ISE Design Suite 14.2, these strategies were not correctly linked for Zynq projects.

The Balanced strategy is available because it is the default setting for every family.

The design goals for Zynq devices will be added in ISE Design Suite 14.3.

To use the Virtex-7 FPGA design goal strategies for Zynq projects in ISE Design Suite 14.2, perform the following:

  1. Copy the *.xds files from /ISE/virtex7/data and paste them to /ISE/zynq/data
  2. Edit each .xds file in the /ISE/zynq/data directory and change the device family line from:

<DeviceList devices="virtex7,virtex7l" />


<DeviceList devices="zynq" />

Alternatively, each Virtex-7 strategy can be opened in the Strategy Editor and saved as a Zynq strategy:
  1. Select Project -> Design Goals & Strategies...
  2. Select Edit Strategy.
  3. In the Edit Design Strategy window, click the Browse (...) button for Strategy File:
  4. Browse and select the desired strategy under /ISE/virtex7/data
  5. Click OK in the dialog box that informs you that you are opening a strategy for a different device family than the current project uses.
  6. Select Save As and save the strategy to a new name. 

The /ISE/virtex7/data/*.xds files will need to be made writeable before using this procedure.

AR# 51318
日期 06/03/2013
状态 Archive
Type 综合文章
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