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AR# 51400

Vivado SysGen - “FIR Compiler v6.3 警告:该模块没有名为 'structural_sim' 的参数。”

Description

If I open up my Vivado SysGen design, the following warning appears in the MATLAB console:

"Warning: In instantiating linked block 'fircv63_paths_four/FIR Compiler 6.3 ' : Xilinx FIR Compiler 6.3 Block block (mask) does not have a parameter named 'structural_sim'"

What does this warning mean and how do I avoid it?

解决方案

这是在 System Generator 14.1、 14.2、 2012.1 和 2012.2 版中的已知问题。

This warning message is harmless and is the result of a change to the simulation model for the FIR Compiler.

如需消除此警告信息,您可以使用 System Generator 2012.3 或更新版本重新保存该设计文件。

AR# 51400
创建日期 08/22/2012
Last Updated 07/01/2013
状态 Active
Type 综合文章
Tools
  • System Generator for DSP - 14
  • System Generator for DSP - 14.1
  • System Generator for DSP - 14.2
  • More
  • Vivado Design Suite
  • Vivado Design Suite - 2012.1
  • Vivado Design Suite - 2012.2
  • Less
IP
  • FIR 编译器