We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 5150

M1.5i Map - Map drops Flop load from signal with multiple loads in Synopsys design.


A design using FPGA Compiler version 1997.08 is creating an sxnf with several buses where some of the driver are not getting connected to the loads. There are 54 x4kma:111 WARNINGs (FMAPs being removed) and 54 x4kma:340 WARNINGs (signals being removed) in the .mrp report.


A fix for this problem is included in the 1.5i Service Pack 1. For details
on this Service Pack see http://www.xilinx.com/techdocs/5514.htm
AR# 5150
日期 04/03/2000
状态 Archive
Type 综合文章