UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 51778

Zynq-7000 - How should the PS DDR3 CKE signal be terminated?

Description

How should the PS DDR3 CKE signal be terminated?

解决方案

For DDR3, CKE should be pulled to VTT via a 40 Ohm resistor, not pulled to GND via 4.7 KOhm as is used in DDR2. 

This provides termination for CKE for self-refresh operations.

The Zynq-7000 All Programmable SoC PCB Design and Pin Planning Guide (UG933) has been updated with this information.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
52540 Zynq-7000 AP SoC - Frequently Asked Questions N/A N/A
AR# 51778
创建日期 09/12/2012
Last Updated 09/26/2016
状态 Active
Type 综合文章
器件
  • Zynq-7000
Boards & Kits
  • Zynq-7000 All Programmable SoC ZC702 Evaluation Kit