UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 51899

Zynq-7000 AP SoC ZC706 Evaluation Kit - Known Issues and Release Notes Master Answer Record

Description

This answer record lists all known issues with the Zynq-7000 SoC ZC706 Evaluation Kit.

解决方案

To identify the silicon on your ZC706, please see (Xilinx Answer 37579).

To begin debugging a suspected hardware issue on the ZC706, see (Xilinx Answer 54013) Zynq-7000 AP SoC ZC706 Evaluation Kit - Board Debug Checklist.

To view the Design Advisories associated with the ZC706, see (Xilinx Answer 53979) Design Advisory Master Answer Record for Zynq-7000 All Programmable SoC ZC706 Evaluation Kit.

The ZC706 Board Debug Checklist and ZC706 Design Advisory Master Answer Record form part of (Xilinx Answer 43745) Xilinx Boards and Kits Solution Center - available to address all questions related to Xilinx Boards and Kits.

Known Issues

Board and Kit Related Issues

 

(Xilinx Answer 53305) Zynq-7000 AP SoC ZC706 Evaluation Kit - SD card is empty
(Xilinx Answer 53174) Zynq-7000 AP SoC ZC706 Evaluation Kit - Kits shipped without ATX (PCIe) MiniFit Jr. adapter
(Xilinx Answer 53862) Zynq-7000 AP SoC ZC706 Evaluation Kit - SW4 settings for the ZC706
(Xilinx Answer 54022) How can I order a TI USB Interface Adapter EVM from Texas Instruments?
(Xilinx Answer 55805) Xilinx Evaluation Kits - Board becomes non-operational when TI USB Interface EVM is attached
(Xilinx Answer 56811) Xilinx Evaluation Kits - How do I reprogram the TI power controllers on my board to the factory defaults?
(Xilinx Answer 58053) Zynq-7000 AP SoC ZC706 Evaluation Kit - JTAG chain not recognized unless SW2 pushed
(Xilinx Answer 58420) ZC706 - Does the ZC706 Evaluation Platform Support SDIO Cards?
(Xilinx Answer 58987) Zynq-7000 AP SoC ZC706 Evaluation Kit - FMC HPC CC pins not connected to Clock Capable pins
(Xilinx Answer 59748) Zynq-7000 AP SoC ZC706 Evaluation Kit - PCB Revision Differences
(Xilinx Answer 61849) 6 series and 7 series Xilinx Evaluation Kits - Known Issues and Release Notes Master Answer Record for the Texas Instruments Power Solution
(Xilinx Answer 64906) Zynq-7000 AP SoC ZC706 Evaluation Kit - Issues when restoring the ZC706 flash
(Xilinx Answer 64890) Xilinx Evaluation Kits - AC701 and ZC706 rev 2.0 - Restoring power controllers
(Xilinx Answer 65207) Zynq-7000 AP SoC ZC706 Evaluation Kit - Changes from rev 1.2 to rev 2.0
(Xilinx Answer 67507) Xilinx Boards and Kits - Power Supply Information

 

 

Documentation Related Issues

Answer Record Title Version Found Version Resolved
(Xilinx Answer 52344) Zynq-7000 AP SoC ZC706 Evaluation Kit - UG954 - Which SD Interface Level Shifter is present on the ZC706 Evaluation Platform? v1.0 v1.1
(Xilinx Answer 53453) Zynq-7000 AP SoC ZC706 Evaluation Kit - GPIO_LED_0 not listed in Table 1-27 of UG954 (v1.1) v1.1 v1.2
(Xilinx Answer 53863) Zynq-7000 AP SoC ZC706 Evaluation Kit - UG961 (v1.0) - SW4 settings to run the BIST on the ZC706 v1.0 v4.0
(Xilinx Answer 54036) Zynq-7000 AP SoC ZC706 - UG963 (v1.0) - SW11 switch settings incorrect for SD card boot v1.0 v2.0
(Xilinx Answer 54037) Zynq-7000 AP SoC ZC706 - UG961 (v1.0) - SW11 switch settings incorrect for SD card boot v1.0 v2.0
(Xilinx Answer 54105) Zynq-7000 AP SoC ZC706 - ZC706 inconsistent pin assignments on FMC connector, Table 1-33 of UG954 (v1.1) v1.1 v1.2
(Xilinx Answer 55184) Zynq-7000 AP SoC ZC706 Evaluation Kit - What is the I2C bus address for the PMBUS_DATA/CLOCK signal? v1.1 v1.2
(Xilinx Answer 58912) Boards and Kits - Board files blocked on xilinx.com    
(Xilinx Answer 66171) Zynq-7000 AP SoC ZC706 Evaluation Kit - Rev 2.0 - POR calculation in schematic is not accurate rev 2.0  
(Xilinx Answer 66252) Zynq-7000 AP SoC ZC706 Evaluation Kit - UG954 (v1.5) - Figure 1-32 C6 value and POR calculation is not accurate v1.5  



Silicon Related Issues

(Xilinx Answer 47915) Design Advisory Master Answer Record for Zynq-7000 AP SoC Devices

 

PCI Express Related Issues

 

(Xilinx Answer 52656) Zynq AP SoC ZC706 Evaluation Kit - PCIe Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform
(Xilinx Answer 53740) Design Advisory for 7 Series Xilinx PCI Express Cores - No Clock Output on TXOUTCLK at Cold Temperature

 

Design Tools Related Issues

 

(Xilinx Answer 52071) Zynq-7000 SoC AP Impact - QSPI programming on the ZC706 (7045) requires the board to be in JTAG mode
(Xilinx Answer 55931) Xilinx Evaluation Kits - What type of license is shipped with Xilinx Evaluation Kits?
(Xilinx Answer 60358) 2014.1 lwIP designs for ZC702 and ZC706 both designs fail to return pings.

 


USEFUL INFORMATION:

Third Party Debug Tool Information

 

(Xilinx Answer 46881) Zynq-7000 - How to setup your Third Party Debug Environment on the ZC702 Board
(Xilinx Answer 47767) Zynq-7000, ZC702 - Lauterbach Startup Script

 

Reference Design Information

 

(Xilinx Answer 46880) Zynq-7000 Example Design - Linear QSPI Performance (Max Effective Throughput)
(Xilinx Answer 46915) Zynq-7000 Example Design - Setup the TRACE port via EMIO on the ZC702 board
(Xilinx Answer 50572) Zynq-7000 Example Design - Interrupt handling of PL generated interrupt

 

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
43750 Xilinx Boards and Kits Solution Center - Top Issues N/A N/A

子答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
52344 Zynq-7000 AP SoC ZC706 Evaluation Kit - (UG954) Which SD Interface Level Shifter is present on the ZC706 Evaluation Platform? N/A N/A
52071 14.x Zynq-7000 SoC AP iMPACT - QSPI programming on the ZC706 (7045 all silicon revs) requires the Zynq device to boot in JTAG mode N/A N/A
52656 Zynq AP SoC ZC706 Evaluation Kit - PCIe Base TRD (v1.0) - PCIe does not link up successfully on Z77 (Ivy Bridge) platforms N/A N/A
53305 Zynq-7000 AP SoC ZC706 Evaluation Kit - SD card is empty N/A N/A
53453 Zynq-7000 AP SoC ZC706 Evaluation Kit - GPIO_LED_0 not listed in Table 1-27 of UG954 (v1.1) N/A N/A
53740 有关 7 系列 Xilinx PCI Express 内核的设计咨询 - 在低温情况下,TXOUTCLK 上无时钟输出 N/A N/A
53862 Zynq-7000 AP SoC ZC706 Evaluation Kit - SW4 settings for the ZC706 N/A N/A
53863 Zynq-7000 AP SoC ZC706 Evaluation Kit - UG961 (v1.0) SW4 settings to run the BIST on the ZC706 N/A N/A
54036 Zynq-7000 AP SoC ZC706 - UG963 (v1.0) - SW11 switch settings incorrect for SD card boot N/A N/A
54037 Zynq-7000 AP SoC ZC706 - UG961 (v1.0) - SW11 switch settings incorrect for SD card boot N/A N/A
54105 Zynq-7000 AP SoC ZC706 - ZC706 inconsistent pin assignments on FMC connector, Table 1-33 of UG954 (v1.1) N/A N/A
54013 Zynq-7000 AP SoC ZC706评估套件 – 开发板调试检查表 N/A N/A
55184 Zynq-7000 AP SoC ZC706 Evaluation Kit - What is the I2C bus address for the PMBUS_DATA/CLOCK signal? N/A N/A
55805 Xilinx Evaluation Kits - Board becomes non-operational when TI USB Interface EVM is attached N/A N/A
54022 How can I order TI USB Interface Adapter EVM from Texas Instruments? N/A N/A
56811 Xilinx Evaluation Kits - How do I reprogram the TI power controllers on my board to the factory defaults? N/A N/A
55931 Xilinx Evaluation Kits - What type of license is shipped with Xilinx Evaluation Kits? N/A N/A
58053 Zynq-7000 AP SoC ZC706 Evaluation Kit - JTAG chain not recognized unless SW2 pushed N/A N/A
58420 ZC706 - Does the ZC706 Evaluation Platform Support SDIO Cards? N/A N/A
58987 Zynq-7000 AP SoC ZC706 Evaluation Kit - FMC HPC CC pins not connected to Clock Capable pins N/A N/A
58479 Zynq-7000 AP SoC ZC706 评估套件 - 从 rev 1.1 至 rev 1.2 N/A N/A
58478 Zynq-7000 AP SoC ZC706 Evaluation Kit - Changes from rev 1.0 to rev 1.1 N/A N/A
59748 Zynq-7000 AP SoC ZC706 Evaluation Kit - PCB Revision Differences N/A N/A
61712 Zynq-7000 AP SoC ZC706 Evaluation Kit - ZC706 Fan stops working when the Vadj voltage is set to 1.8V N/A N/A
64906 Zynq-7000 AP SoC ZC706 Evaluation Kit - Issues when restoring the ZC706 flash N/A N/A
64890 Xilinx Evaluation Kits - AC701 and ZC706 rev 2.0 - Restoring power controllers N/A N/A
65207 Zynq-7000 AP SoC ZC706 Evaluation Kit - Changes from rev 1.2 to rev 2.0 N/A N/A
66171 Zynq-7000 AP SoC ZC706 Evaluation Kit - Rev 2.0 - POR calculation in schematic is not accurate N/A N/A
66252 Zynq-7000 AP SoC ZC706 Evaluation Kit - UG954 (v1.5) - Figure 1-32 C6 value and POR calculation is not accurate N/A N/A
67507 Xilinx Boards and Kits - Power Supply Information N/A N/A

相关答复记录

AR# 51899
创建日期 09/19/2012
Last Updated 07/14/2016
状态 Active
Type 已知问题
器件
  • Zynq-7000
Boards & Kits
  • Zynq-7000 All Programmable SoC ZC706 Evaluation Kit