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AR# 52023

Zynq-7000 AP SoC, Boot IOP - SD card controller does not wait 74 clock cycles to issue CMD0

描述

The SD cardspecification requires the controller to wait for74clock cycles after the start of the SD clock before issuing the firstCMD0, but the SD card controller only waits 3.5 clock cycles.

解决方案

During the SD card boot process, the controller starts the SD clock and almost immediately (3.5 SD clocks) issues its first CMD0 command to the SD card. This command may come too quickly for some SD cards to respond. The result during the boot process can be a system hang or an error lockdown situation.

The SD card specification requires a delay of 74 SD clock cycles. Most cards do no require this many clock cycles. Many cards work fine with the 3.5 clock cycledelay.

Impact:
Minor..
Work-around:
Use a card that works with little or no delay before issuing the CMD0 command..
Configurations Affected:
Systems that usean SD card.
Device Revision(s) Affected: Refer to (Xilinx Answer 47916) - Zynq-7000 Design Advisory Master Answer Record.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
47916 Zynq-7000 AP SoC 器件:芯片修订差异 N/A N/A
AR# 52023
日期 01/10/2013
状态 Active
Type 设计咨询
器件
  • Zynq-7000
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