AR# 5208


MAP: "ERROR:xvkma:120 - LUT* symbol has an equation that has no connected signal" with Synplify 5.0.x


Keywords: Synplify, Map, xvkma

Urgency: Hot

General Description:
When generating implementation netlists for Virtex, selecting
"Result Format: XNF" within Synplify 5.0.x generates following Map error:

ERROR:xvkma:120 - LUT2 symbol "controller.write_sdram_sm.un73_axb_2"
(output signal=controller.write_sdram_sm.un73_axb_2) has an equation that
uses an input pin that has no connected signal. Make sure that all the pins
used in the equation for this LUT have signals that are not trimmed (see trim
report for details on which signals were trimmed). The original signals
connected to the LUT are: VCC buffer_max_size[2]


This was common in versions of Synplify prior to 5.1.2. If you are using a
more recent version, this error is due to bad connections in the netlist such
as nets that are not driven or hanging. Please contact Synplicity support for
assistance if the below suggestion does not solve your problem.

For versions prior to 5.1.2, select "Result Format: EDIF" when generating
implementation netlists for Virtex. The resultant EDIF now contains
cell declarations for VCC and GND that drive the dangling nets.
Target -> Set Device Options -> Result Format -> EDIF

This is fixed in Synplify 5.1.2 and later. Synplicity has removed the option
of targetting to XNF for Virtex in this version.
AR# 5208
日期 03/27/2000
状态 Archive
Type 综合文章
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