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AR# 52296

LogiCORE IP DisplayPort v3.2 - Is a DCM or PLL required to generate the RXUSRCLK2 for the Spartan-6 FPGA GTP?

描述

Is a PLL or DCM required to generate the RXUSRCLK2 for the Spartan-6 FPGA GTP?

解决方案

The example designs in XAPP493 and XAPP593 use the Spartan-6 FPGA PLL/DCM, but is this necessary?

There is reference code that seems to indicate that the PLL or DCM is required, but this code is commented out by default. It is not necessary to use a PLL or DCM to generate the RXUSRCLK2. A BUFIO2 can be used to generate the RXUSRCLK2 input if a PLL or DCM is not available. If using the BUFIO2, please see (Xilinx Answer 56113).

For a detailed list of LogiCORE IP DisplayPort Release Notes and Known Issues, see (Xilinx Answer 33258).

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
33258 LogiCORE IP DisplayPort - Release Notes and Known Issues N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
56113 Spartan-6 BUFIO2, DIVIDE 设计咨询= 第 2 版 N/A N/A
AR# 52296
日期 06/10/2013
状态 Archive
Type 综合文章
IP
  • DisplayPort
的页面