How do I create custom IP with multiple AXI interfaces? For example, a core that uses an AXI4-Lite and an AXI-Stream interface simultaneously.
Except for the AXI4 Master IPIF example, the Xilinx EDK Create Import (CIP) Wizard does not create multiple interface examples.
An overview of using multiple AXI interfaces manually can be accomplished by merging multiple example cores:
A complex example for a multiple interface core can be found in the AXI_DMA core, which uses AXI4, AXI4-Lite, and AXI-Stream interfaces.
Note: Xilinx does not support User Custom IP, including the Custom IP mentioned above. To debug Custom AXI IP, AXI BFM can be used.