Not all of the ports in my design are analyzed when I run SSN analysis with PlanAhead tool 14.3 or 14.4. Note that in the example report below, only 31 of 35 ports (88.6%) were analyzed. Why is this happening?
|Created on: 2012-Nov-06 11:48:02
Results Name: ssn_1
Project Name: ise
Project Family: Spartan-6
Project Part: xc6slx4tqg144-2
SSN Data Version: Advanced
|Status: Partial Analysis;Passed|
Possible SSN Ports: 35 port(s)
Analyzed Ports: 31/35 port(s) (88.6%)
Ports within SNN Margin: 31/31 port(s) (100.0%)
Ports Exceeding SNN Margin: 0/31 port(s) (0.0%)
Unplaced Ports: 0 port(s)
In PlanAhead tool 14.3 or 14.4, if an I/O bank only contains I2C IOSTANDARD, then SSN analyzer will not include this bank.
To work around this issue, declare an additional LVCMOS output in that bank and permanently tie it to HIGH or LOW. After doing that, the I2C pins in that bank will be analyzed. The SSN results will be slightly higher than actual value because of this additional output.
This issue is resolved in the 14.5 PlanAhead tool.