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AR# 53129

14.3 EDK - Create Import Peripheral - Memory Mapped Burst Compatible Master IPIF Signals

描述

I am using the Create and Import Peripheral (CIP) Wizard to create a custom peripheral with an AXI4 Memory Mapped Burst Compatible interface and Master support.

There are master IPIF signals which do not appear to be documented (for example, ip2bus_mst*).  

Where are these signals documented?

解决方案

For more information on these signals, users should refer to DS844, LogiCORE IP AXI Master Burst.

AR# 53129
日期 09/15/2014
状态 Active
Type 综合文章
器件
  • FPGA Device Families
Tools
  • ISE Design Suite
  • PlanAhead
  • EDK
  • ISE
的页面