Is it possible to add a Debug port in Vivado post implementation, similar to adding a probe in the ISE FPGA Editor without modifying the design?
If so, how can this be done in Vivado?
Yes, this is also possible with Vivado.
Using the Vivado ECO flow, it is very easy to make any internal signal external by connecting it to any free device pin.
Steps to follow:
Note that the ECO edits are only available when opening DCPs, and cannot be made within a project using the "Open Implemented Design" button.
A Vivado project will have DCPs available under the <project>.runs/impl_1/<project>_<step>.dcp path.