AR# 53372: Artix-7 FPGA AC701 Evaluation Kit Targeted Reference Design - Release Notes and Known Issues Master Answer Record
Artix-7 FPGA AC701 Evaluation Kit Targeted Reference Design - Release Notes and Known Issues Master Answer Record
This is the Release Note and Known Issues Master Answer Record for the Artix-7 FPGA AC701 Evaluation Kit Targeted Reference Design.
The purpose of this article is to help the user avoid running into issues when performing intended operations with the TRD.
The Artix-7 FPGA AC701 Evaluation Kit TRD is developed on the Artix-7 FPGA AC701 Evaluation Kit.
The primary components of the TRD are:
Xilinx 7 series FPGAs Integrated Block for PCI Express core
Northwest Logic Packet DMA core
LogiCORE IP DDR3 SDRAM memory interface generator core
LogiCORE IP AXI4-Stream Interconnect core
LogiCORE IP AXI Virtual FIFO Controller core
Additionally, the design uses a PicoBlaze processor core to provide power and FPGA die temperature monitoring capability.
The design also provides 32-bit Linux drivers for the Fedora 16 operating system and a graphical user interface (GUI) to control tests and to monitor status.
AC701 Base Kit
PC with PCI Express slot (x4 / x8 / x16 PCIe v2.1 compliant)
Keyboard & Mouse
ModelSim (version specific, see specific TRD version information below)
Vivado (version specific, see specific TRD version information below)
Note: Before running any command line scripts, refer to the Xilinx Design Tools: Installation and Licensing document to learn how to set the appropriate environment variables for your operating system.
All scripts mentioned in this readme file assume that the XILINX environment variable has been set.
Artix-7 Base Targeted Reference Design v1.0 for Vivado 2012.4 with Production Silicon
The Artix-7 FPGA AC701 Evaluation Kit ships with Production silicon.
7 series PCIe (pcie_7x) : v1.8
7 series MIG (mig_7x) : v1.8.a
AXI Stream Interconnect (axis_ic) : v1.1
AXI Virtual FIFO Controller (axi_vfifo) : v1.1
DMA Back End AXI Model (dma_back_end_axi_model) : P.40xd
LogiCORE IP AXI4-Lite IPIF (axi_lite_ipif) : v1.00.a
LogiCORE IP AXI Virtual FIFO Controller (axi_vfifo_ctrl_ip) : P.49a