UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
  1. Xilinx -灵活应变. 万物智能.
  2. 技术支持
  3. AR# 53372: Artix-7 FPGA AC701 Evaluation Kit Targeted Reference Design - Release Notes and Known Issues Master Answer Record

AR# 53372

Artix-7 FPGA AC701 Evaluation Kit Targeted Reference Design - Release Notes and Known Issues Master Answer Record

描述

This is the Release Note and Known Issues Master Answer Record for the Artix-7 FPGA AC701 Evaluation Kit Targeted Reference Design.

The purpose of this article is to help the user avoid running into issues when performing intended operations with the TRD.

解决方案

The Artix-7 FPGA AC701 Evaluation Kit TRD is developed on the Artix-7 FPGA AC701 Evaluation Kit.

The primary components of the TRD are:

  • Xilinx 7 series FPGAs Integrated Block for PCI Express core
  • Northwest Logic Packet DMA core
  • LogiCORE IP DDR3 SDRAM memory interface generator core
  • LogiCORE IP AXI4-Stream Interconnect core
  • LogiCORE IP AXI Virtual FIFO Controller core

Additionally, the design uses a PicoBlaze processor core to provide power and FPGA die temperature monitoring capability.

The design also provides 32-bit Linux drivers for the Fedora 16 operating system and a graphical user interface (GUI) to control tests and to monitor status.

Requirements:

Hardware

  • AC701 Base Kit
  • PC with PCI Express slot (x4 / x8 / x16 PCIe v2.1 compliant)
  • Keyboard & Mouse

Software

  • ModelSim (version specific, see specific TRD version information below)
  • Vivado (version specific, see specific TRD version information below)

    • Note: Before running any command line scripts, refer to the Xilinx Design Tools: Installation and Licensing document to learn how to set the appropriate environment variables for your operating system.
    All scripts mentioned in this readme file assume that the XILINX environment variable has been set.

Artix-7 Base Targeted Reference Design v1.0 for Vivado 2012.4 with Production Silicon

Silicon

  • The Artix-7 FPGA AC701 Evaluation Kit ships with Production silicon.

IP

  • 7 series PCIe (pcie_7x) : v1.8
  • 7 series MIG (mig_7x) : v1.8.a
  • AXI Stream Interconnect (axis_ic) : v1.1
  • AXI Virtual FIFO Controller (axi_vfifo) : v1.1
  • DMA Back End AXI Model (dma_back_end_axi_model) : P.40xd
  • LogiCORE IP AXI4-Lite IPIF (axi_lite_ipif) : v1.00.a
  • LogiCORE IP AXI Virtual FIFO Controller (axi_vfifo_ctrl_ip) : P.49a

Known Issues

(Xilinx Answer 53489) Artix-7 FPGA AC701 Evaluation Kit - Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform
(Xilinx Answer 55925) Artix-7 FPGA AC701 Evaluation Kit - Recommended machines for Artix-7 FPGA Base Targeted Reference Design

Artix-7 Base Targeted Reference Design v1.1 for Vivado 2013.1 with Production Silicon

Silicon

  • The Artix-7 FPGA AC701 Evaluation Kit ships with Production silicon.

IP

  • 7 series PCIe (pcie_7x) : v2.0
  • 7 series MIG (mig_7x) : v1.9.a
  • AXI Stream Interconnect (axis_ic) : v1.1
  • AXI Virtual FIFO Controller (axi_vfifo) : v2.0
  • DMA Back End AXI Model (dma_back_end_axi_model) : P.40xd
  • LogiCORE IP AXI4-Lite IPIF (axi_lite_ipif) : v1.00.a
  • LogiCORE IP AXI Virtual FIFO Controller (axi_vfifo_ctrl_ip) : P.49a

Known Issues

(Xilinx Answer 53489) Artix-7 FPGA AC701 Evaluation Kit - Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform
(Xilinx Answer 55925) Artix-7 FPGA AC701 Evaluation Kit - Recommended machines for Artix-7 FPGA Base Targeted Reference Design


Software

  • QuestaSim v10.1b
    Vivado Design Suite 2013.1

Artix-7 Base Targeted Reference Design v1.2 for Vivado Design Suite 2013.2 with Production Silicon

Silicon

  • The Artix-7 FPGA AC701 Evaluation Kit ships with Production silicon

IP

  • 7 series PCIe (pcie_7x) : v2.1
  • 7 series MIG (mig_7x) : v2.0
  • AXI Stream Interconnect (axis_ic) : v1.1
  • AXI Virtual FIFO Controller (axi_vfifo) : v2.0
  • DMA Back End AXI Model (dma_back_end_axi_model) : P.40xd
  • LogiCORE IP AXI4-Lite IPIF (axi_lite_ipif) : v1.00.a
  • LogiCORE IP AXI Virtual FIFO Controller (axi_vfifo_ctrl_ip) : P.49a

Known Issues

(Xilinx Answer 53489) Artix-7 FPGA AC701 Evaluation Kit - Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform
(Xilinx Answer 55925) Artix-7 FPGA AC701 Evaluation Kit - Recommended machines for Artix-7 FPGA Base Targeted Reference Design

Software

  • QuestaSim v10.2a
    Vivado Design Suite 2013.2

Artix-7 Base Targeted Reference Design v1.3 for Vivado Design Suite 2013.3 with Production Silicon

Silicon

  • The Artix-7 FPGA AC701 Evaluation Kit ships with Production silicon

IP

  • 7 series PCIe (pcie_7x) : v2.2
  • 7 series MIG (mig_7x) : v2.0
  • AXI Stream Interconnect (axis_ic) : v1.1
  • AXI Virtual FIFO Controller (axi_vfifo) : v2.0
  • DMA Back End AXI Model (dma_back_end_axi_model) : P.40xd
  • LogiCORE IP AXI4-Lite IPIF (axi_lite_ipif) : v1.00.a
  • LogiCORE IP AXI Virtual FIFO Controller (axi_vfifo_ctrl_ip) : v2.0

Known Issues

(Xilinx Answer 53489) Artix-7 FPGA AC701 Evaluation Kit - Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform
(Xilinx Answer 55925) Artix-7 FPGA AC701 Evaluation Kit - Recommended machines for Artix-7 FPGA Base Targeted Reference Design

Software

  • QuestaSim v10.2a
    Vivado Design Suite 2013.3

Artix-7 Base Targeted Reference Design v1.4 for Vivado Design Suite 2013.4 with Production Silicon

Silicon

  • The Artix-7 FPGA AC701 Evaluation Kit ships with Production silicon

IP

  • 7 series PCIe (pcie_7x) : v3.0
  • 7 series MIG (mig_7x) : v2.0
  • AXI Stream Interconnect (axis_ic) : v1.1
  • AXI Virtual FIFO Controller (axi_vfifo) : v2.0
  • DMA Back End AXI Model (dma_back_end_axi_model) : P.40xd
  • LogiCORE IP AXI4-Lite IPIF (axi_lite_ipif) : v1.00.a
  • LogiCORE IP AXI Virtual FIFO Controller (axi_vfifo_ctrl_ip) : v2.0

Known Issues

(Xilinx Answer 53489) Artix-7 FPGA AC701 Evaluation Kit - Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform
(Xilinx Answer 55925) Artix-7 FPGA AC701 Evaluation Kit - Recommended machines for Artix-7 FPGA Base Targeted Reference Design

Software

  • QuestaSim v10.2a
    Vivado Design Suite 2013.4
Artix-7 Base Targeted Reference Design v1.5 for Vivado Design Suite 2014.1 with Production Silicon

Silicon

  • The Artix-7 FPGA AC701 Evaluation Kit ships with Production silicon

IP

  • 7 series PCIe (pcie_7x) : v3.0
  • 7 series MIG (mig_7x) : v2.0
  • AXI Stream Interconnect (axis_ic) : v1.1
  • AXI Virtual FIFO Controller (axi_vfifo) : v2.0
  • DMA Back End AXI Model (dma_back_end_axi_model) : P.40xd
  • LogiCORE IP AXI4-Lite IPIF (axi_lite_ipif) : v1.00.a
  • LogiCORE IP AXI Virtual FIFO Controller (axi_vfifo_ctrl_ip) : v2.0

Known Issues

(Xilinx Answer 53489) Artix-7 FPGA AC701 Evaluation Kit - Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform
(Xilinx Answer 55925) Artix-7 FPGA AC701 Evaluation Kit - Recommended machines for Artix-7 FPGA Base Targeted Reference Design


Software

  • QuestaSim v10.2a
    Vivado Design Suite 2014.1

Artix-7 Base Targeted Reference Design v1.6 for Vivado Design Suite 2014.3 with Production Silicon


Silicon

  • The Artix-7 FPGA AC701 Evaluation Kit ships with Production silicon

IP

  • 7 series PCIe (pcie_7x) : v3.0
  • 7 series MIG (mig_7x) : v2.0
  • AXI Stream Interconnect (axis_ic) : v1.1
  • AXI Virtual FIFO Controller (axi_vfifo) : v2.0
  • DMA Back End AXI Model (dma_back_end_axi_model) : P.40xd
  • LogiCORE IP AXI4-Lite IPIF (axi_lite_ipif) : v1.00.a
  • LogiCORE IP AXI Virtual FIFO Controller (axi_vfifo_ctrl_ip) : v2.0

Known Issues

(Xilinx Answer 53489) Artix-7 FPGA AC701 Evaluation Kit - Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform
(Xilinx Answer 55925) Artix-7 FPGA AC701 Evaluation Kit - Recommended machines for Artix-7 FPGA Base Targeted Reference Design


Software

  • QuestaSim v10.2a
    Vivado Design Suite 2014.3

Artix-7 Base Targeted Reference Design v1.7 for Vivado Design Suite 2015.1 with Production Silicon
 

Silicon

  • The Artix-7 FPGA AC701 Evaluation Kit ships with Production silicon

IP

  • 7 series PCIe (pcie_7x) : v3.1
  • 7 series MIG (mig_7x) : v2.3
  • AXI Stream Interconnect (axis_ic) : v1.1
  • AXI Virtual FIFO Controller (axi_vfifo) : v2.0
  • DMA Back End AXI Model (dma_back_end_axi_model) : P.40xd
  • LogiCORE IP AXI4-Lite IPIF (axi_lite_ipif) : v1.00.a
  • LogiCORE IP AXI Virtual FIFO Controller (axi_vfifo_ctrl_ip) : v2.0

Known Issues

(Xilinx Answer 53489) Artix-7 FPGA AC701 Evaluation Kit - Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform
(Xilinx Answer 55925) Artix-7 FPGA AC701 Evaluation Kit - Recommended machines for Artix-7 FPGA Base Targeted Reference Design

Software

  • QuestaSim v10.3d
    Vivado Design Suite 2015.1

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
51900 Artix-7 FPGA AC701 Evaluation Kit - Known Issues and Release Notes Master Answer Record N/A N/A

子答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
53489 Artix-7 FPGA AC701 Evaluation Kit - Targeted Reference Design - PCIe does not link up on Z77 (Ivy Bridge) platform N/A N/A
AR# 53372
日期 09/01/2015
状态 Active
Type 已知问题
Boards & Kits
的页面