UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 53831

14.4 PlanAhead - Changes are not saved in the UCF file when multiple instances are "Fixed" at once

描述

If the PlanAhead tool is launched from within Project Navigator (e.g., Analyze Timing / Floorplan Design (PlanAhead)), some constraints are not saved when prompted.

For example, when multiple block RAM instances are selected in the Device View, and Fix Instances is selected, these constraints are not saved in the UCF when the constraints are saved (File -> Save Constraints).

However, when one block RAM instance is selected, this constraint is saved in the UCF when the constraints are then saved (File -> Save Constraints).

解决方案

This issue has been resolved in the 14.5 PlanAhead tool.
AR# 53831
日期 11/11/2013
状态 Archive
Type 已知问题
器件
  • FPGA Device Families
Tools
  • ISE Design Suite - 14
的页面