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AR# 54218

ISE 14.4 - XST generates incorrect logic resulting in a simulation mismatch on the adder tree


XST creates incorrect logic when there is an adder tree of depth three or more levels with std_logic_vector operands.

The resulting logic can result in a simulation mismatch.


The following options can be used as a work-around:

  1. Reducing the depth of the tree.
  2. Changing the element type to integer from std_logic_vector and converting the integer value of the resultant adder operation to std_logic_vector via the std_logic_vector conversion function.
  3. Changing the leaves to "addition" if in the case where the leaves contain "subtraction" or "multiplication" operators.

Following are fixes that are available when running XST via the ISE tools GUI and command line for fixing the issue by disabling the adder tree optimization:

1. XST run via ISE tools GUI - Lin64 and NT64 patches have been created for ISE 14.4, ISE 14.2, and ISE 13.4 to fix this issue for the ISE tools GUI and have been attached to this answer record. The patch needs the environment variable XIL_XST_ADDERTREE_ZERO to be set to 1.
2. XST run via command line - Add the following lines of code within .xst or .scr file before the run command:

set -checkcmdline no
set -addertree 0

The issue is fixed in ISE Design Suite 14.5 with the above work-around options mentioned for the ISE tools GUI and command line.

AR# 54218
日期 07/10/2013
状态 Active
Type 已知问题
  • ISE Design Suite - 13
  • ISE Design Suite - 14