The Design Advisory for MIG 7 Series DDR3/DDR2 (Xilinx Answer 51687) states, "To disable the instantiation of the XADC within the generated MIG 7 series core, set the "XADC Instantiation" option to "Disabled." This option is available on the "FPGA Options" screen of the MIG 7 Series tool"
However, the XADC Instantiation option is grayed out in the configuration IP GUI for AXI 7 series DDRx IP, and cannot be changed.
How can I fix this?
The parameter C_USE_EXTERNAL_XADC can be set manually to 1 in the MHS file in the XPS project as shown below:
AR# 54380 | |
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日期 | 09/17/2014 |
状态 | Active |
Type | 综合文章 |
Tools |