This answer record contains the Release Notes and Known Issues for the LogiCORE IP Test Pattern Generator (TPG) core and includes the following:
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2013.1 and newer tool versions.
Please reference XTP025 - IP Release Notes Guide for past known issue logs and ISE support information.
LogiCORE IP Test Pattern Generator core IP Page:
Supported devices can be found in the following three locations:
For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado.
This table correlates the core version to the first Vivado design tools release version in which it was included.
|Core Version||Vivado Tools Version|
|v7.0 (Rev 4)||2016.3|
|v7.0 (Rev 3)||2016.2|
|v7.0 (Rev. 2)||2016.1|
|v7.0 (Rev. 1)||2015.4|
|v6.0 (Rev. 4)||2015.1|
|v6.0 (Rev. 3)||2014.4|
|v6.0 (Rev. 2)||2014.3|
|v6.0 (Rev. 1)||2014.2|
|v5.0 (Rev. 3)||2013.4|
|v5.0 (Rev. 2)||2013.3|
|v5.0 (Rev. 1)||2013.2|
The table below provides answer records for general guidance when using the LogiCORE IP Test Pattern Generator core.
|(Xilinx Answer 68009)||Upgrade from 2016.2 to 2016.3 changes the behavior of the Test Pattern Generator|
|(Xilinx Answer 66350)||IP is locked due to licensing error after migration from v6.0|
|(Xilinx Answer 65707)||Constant mode no longer available|
Known and Resolved Issues
The following table provides known issues for the LogiCORE IP Test Pattern Generator core, starting with v5.0, initially released in the Vivado 2013.1 tool.
Note: The "Version Found" column lists the version the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
|Answer Record||Title||Version Found||Version Resolved|
|(Xilinx Answer 68086)||Maximum S_AXI "Tdata_num_bytes" Data Width Incorrectly Set||V7.0||N/A|
|(Xilinx Answer 65784)||Error-[XMRE] Cross-module reference resolution error||v7.0||N/A|
|(Xilinx Answer 65783)||[filemgmt 20-1741] File 'v_tpg_config.h' is used by one or more modules||v7.0||v7.0 (Rev. 1)|
|(Xilinx Answer 63688)||Slice range direction "to" does not match prefix slice direction "downto"||v6.0 (Rev 1)||v7.0|
|(Xilinx Answer 60167)||Why does the Test Pattern Generator stop working after ~3-4 hours?||v5.0 (Rev. 3)||v6.0|
|(Xilinx Answer 59271)||Why is the output corrupt when the Test Pattern Generator (TPG) is configured for YUV 4:4:4 and bypass mode is selected?||v4.00.a||v6.0|
|(Xilinx Answer 56274)||Vivado 2013.2 Multimedia Video and Imaging - How do I properly constrain the Video IP in my design?||v5.0||v5.0 (Rev. 2)|
|(Xilinx Answer 54660)||When using the Video Timing Controller, Test Pattern Generator, RGB2YCrCb Color-Space Converter or YCrCb2RGB Color-Space Converter cores, why do I get an error saying that my design can not generate a bitstream?||v4.01.a||v5.0 (Rev. 2)|
|(Xilinx Answer 55980)||Why do I see write failures on the AXI4-Lite bus, when the AXI4-Stream clock is at a different frequency than the AXI4-Lite interface clock?||v5.0||v5.0 (Rev. 1)|
|(Xilinx Answer 56929)||Color bars are incorrect colors in constant RGB mode||v5.0||v5.0 (Rev. 1)|
|10/17/2016||Added (Xilinx Answer 68086) to known issues|
|10/05/2016||Added v7.0 (Rev. 3) and v7.0 (Rev. 4) to Version Table. Added (Xilinx Answer 68009)|
|04/06/2016||Added v7.0 (Rev. 1) and v7.0 (Rev. 2) to Version Table.|
|01/07/2016||Added (Xilinx Answer 66350)|
|10/28/2015||Added v7.0 to Version Table, added (Xilinx Answer 65783), (Xilinx Answer 65784)|
|03/13/2015||Added (Xilinx Answer 63688)|
|08/18/2014||Added (Xilinx Answer 54536)|
|04/16/2014||Added v6.0 to Version Table and (Xilinx Answer 60167) updated Known and Resolved Issues table for 2014.1|
|01/29/2014||Added v5.0 (Rev. 3) to Version Table and (Xilinx Answer 59271)|
|10/23/2013||Added v5.0 (Rev. 2) to Version Table, (Xilinx Answer 54660) and updated Known and Resolved Issues table for 2013.3|
|06/19/2013||Added v5.0 (Rev. 1) to Version Table, (Xilinx Answer 56274), (Xilinx Answer 55980)|