This Release Notes and Known Issues Answer Record is for the Soft Error Mitigation Controller for ISE Versions 14.5 and later.
For installation instructions, general CORE Generator known issues, and design tools requirements, see the IP Release Notes Guide.
For Known Issues for SEM in Vivado, see (Xilinx Answer 54642).
For design tips and knowledge, please refer to Soft Error Mitigation Controller - Frequently Asked Questions (Xilinx Answer 42103)
New Features for v3.6
Supported Devices for v3.6
The following device families are supported by the core for this ISE release.
Note: For the previous version's "New Features" and "Supported Devices", see the readme.txt or version information file available with the generated core.
Known Issues (after ISE Version 14.5)
For known issues prior to the 14.5 release, please refer to (Xilinx Answer 44541). It is advised to use the most recent version of the SEM IP that matches the ISE version listed below.
This table correlates the core version to the first ISE software release version in which it was included.
Note: The "Version Found" column lists the version in which the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify in earlier versions.
|(Xilinx Answer 65554)||Soft Error Mitigation (SEM) PG036 Section Update: Sample Spartan-6 Reliability Estimation for Spartan-6 SEM v3.4 and newer||v3.4||N/A|
|(Xilinx Answer 65402)||Soft Error Mitigation (SEM) IP - When performing error injection into configuration memory high performance interfaces may experience bit errors||v3.4||N/A|
|(Xilinx Answer 65308)||Soft Error Mitigation IP - 7 Series and Zynq-7000 Enhanced Repair initialization times are incorrect in PG036 for select devices. PG036 will be updated with the correct numbers in Vivado 2015.3||v3.4|
PG036 ISE v3.4.1
PG036 Vivado 2015.3
|(Xilinx Answer 60099)||IP Soft Error Mitigation Spartan-6 Error Injection limitation||v3.6||Never Fix|
|(Xilinx Answer 55862)||LogiCORE IP Soft Error Mitigation Controller v3.5 - Production IP requirements when targeting Spartan-6 devices||v3.5||v3.6|
|(Xilinx Answer 55297)||v3.5 - Setup time violations on Artix-7 and Zynq-7000 devices with 100 MHz ICAP clock||v3.5||Never Fix|
|(Xilinx Answer 54285)*||v3.5 - Requirements for Support of Larger Densities of SPI Flash||N/A||N/A|
|(Xilinx Answer 47292)*||Example Design UCF Pinout Constraints for the VC707 and KC705 Boards||N/A||N/A|
|(Xilinx Answer 51043)||Soft Error Mitigation (SEM) IP Core failure to initialize when programmed through a Digilent Programming Solution||v3.2||Not Resolved|
|(Xilinx Answer 47402)||Vivado 2012.1 / ISE Design Suite - 7 Series maximum frequency is 70 MHz|
|(Xilinx Answer 44545)*||"ERROR:Bitgen:342 - This design contains pins which are not constrained..."|
|(Xilinx Answer 42483)*||Spartan-6 Soft Error Mitigation Controller - Component switching limit errors|
|(Xilinx Answer 61241)||Soft Error Mitigation IP Guidance for testing with error injection|
|(Xilinx Answer 65539)||Soft Error Mitigation IP - What is the valid range of addresses for error injection by LFA targeting Virtex-6, 7 Series, and Zynq-7000 devices?|
|(Xilinx Answer 61736)||Soft Error Mitigation IP - What is the valid range of addresses for error injection by LFA targeting Spartan-6 devices?|
6/19/2013 - Initial release