AR# 54937


14.2 Virtex-7 (V7) GSR not working correctly with the StartupE2 primative in simulation


When running a simulation for Virtex-7 FPGA and using a StartupE2 block to simulate the global reset behavior of the device, the simulation shows the GSR reset will never assert, causing incorrect simulation results. 


This is a known issue with the ISE based tool flow as of the 14.2 release. The issue has been repaired as of the 14.3 release.

AR# 54937
日期 06/03/2013
状态 Active
Type 综合文章
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