AR# 55470

2013.2 Vivado - A Vivado project containing an IP Integrator (IPI) design block (.db file) loses implementation status when the design is closed and reopened


I have a project that has been synthesized and implemented, but when I open the implemented project, Vivado reports the following:

Implementation status( synthesis/implementation) out of date.

I expect this to say:

Synthesis/Implementation complete

Clicking on (out of date) more information, reports is modified.

I have not updated Is my Design Block being updated somehow?
Why is Synthesis and Implementation going Out of Date?
How can I can download the bit file into hardware without having tore-implementing my design?


This Out-of-Date issue occurs when an IPI design (e.g., in this example) contains IP cores that do not have the latest version of the IP.
This should not be a problem and should not put the project status out of date. However, because of an older IP core version, the IP Integrator will consider the design block as being "stale."
The IPI design block staleness state is determined independent of what was delivered for synthesis / implementation products (e.g., RTL sources, constraints, etc.). Therefore, it should not effect the Vivado project status.

There are two ways to work around this issue:

  • Disable the file.
  • Force the synthesis / implementation runs up-to-date

Doing so will prevent this false run staleness condition from occurring, when opening or closing a project.

This issue is resolved in Vivado Design Suite 2013.3.

AR# 55470
日期 10/07/2013
状态 Archive
Type 已知问题