AR# 56216


MIG 7 Series - RLDRAM3 does not allow Data placed on T0/T3 byte groups when Data Mask and Internal Vref are enabled


Version Found: v1.9a
Version Resolved: See (Xilinx Answer 54025)

MIG 7 Series RLDRAM3 v1.9a design does not allow data to be placed on T0 or T3 byte groups when DM and Internal Vref are enabled even though this is a valid configuration.


This only occurs in the MIG GUI during IP generation when using the Bank Selection mode.

To work around the issue and to place data pins on T0 or T3 byte groups when DM and Internal Vref are enabled, the "Fixed Pin Out" mode can be used.

Revision History

06/19/2013 - Initial release



Answer Number 问答标题 问题版本 已解决问题的版本
54025 MIG 7 Series - IP Release Notes and Known Issues for Vivado N/A N/A
AR# 56216
日期 06/03/2013
状态 Active
Type 已知问题
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