FIR compiler v7.1 fails in simulation with a M_AXIS_DATA_TDATA mismatch error with the following configuration:
Filter Type = Interpolation
Channel Sequence = Advanced
Optimization Goal = Speed OR
Optimization Goal = Custom and Optimization List contains Control_LUT_Pipeline
Has ARESETn = true
When you apply a reset, then the output sample values might mismatch between the behavioral model and the post synthesis/implementation simulation models for the first N samples; where N = Number of Channels * Interpolation Rate. After the first N samples, the model outputs will then match. The mismatch only occurs for a specific timing relationship between the qualified input samples; s_axis_data_tvalid and aresetn.
This is a known issue with FIR Compiler v7.1 using the configuration above.
To work around this issue, perform one of the following work-arounds:
Assert aresetn for 3 clock cycles rather than the minimum requirement of 2 clock cycles.
Deselect the Control_LUT_Pipeline optimization.