The Design Assistant will walk you through the recommended design flow for HSSIO while debugging commonly encountered issues.
The Design Assistant not only provides useful design and troubleshoot information, but also points you to the exact documentation you need to read to help you design efficiently with HSSIO.
Note: This answer record is part of Xilinx HSSIO Solution Center (Xilinx Answer 37181). The Xilinx HSSIO Solution Center is available to address all questions related to HSSIO.
Whether you are starting a new design or troubleshooting a problem, use the HSSIO Solution Center to guide you to the right information.
This answer record presents a structured guide to using the Xilinx High Speed Serial Transceivers.
Below you will find links to documentation, support resources, and targeted answer records guiding each step of the transceiver design creation.
These are the Xilinx devices containing serial transceivers:
Each of these devices has an associated user guide which details the features and use of the serial transceivers in them.
These guides can be found on the Xilinx Documentation page at:
To obtain alerts for any documentation, please sign-up here:
Sign up for alerts - You especially want to stay up-to-date on the latest Design Advisories for your product.
Likewise, many product families have a master answer record to assist in tracking known issues:
Xilinx also provides community forums and training to help designers better understand these products:
For guidance on using and debugging serial transceivers beyond these resources, please select the answer record below that is most relevant to your question(s).
Xilinx encourages the following design flow for incorporating serial transceivers into a design:
|(Xilinx Answer 57259)||Creating the HSSIO with the Wizard||Every HSSIO design should be started by using the appropriate wizard to create an example design approximating the intended functionality of the link.
Details on how to select appropriate settings are given in this answer record, the wizard user guide, and the transceiver user guide.
|(Xilinx Answer 57260)||Design Implementation||Once suitable IP has been generated by the wizard, it should then be used to create an example design and incorporated into the actual design logic it is meant for.
Some modifications might be necessary, but the vast majority of MGT settings should be left to the wizard.
This answer record contains guidance on going through this process.
|(Xilinx Answer 57261)||Digital Simulation||Along with the example design, the transceiver wizard provides wrappers around a digital simulation model of the transceiver.
This can be used to accurately simulate the transceiver bring-up, resets, and interaction with user logic.
Digital simulation should be performed to verify the behavior of the transceiver in your design.
|(Xilinx Answer 57191)||Electrical Simulation||Electrical simulation pertains to verifying the integrity of your physical link. Signal integrity can be simulated using Xilinx-provided IBIS-AMI models.
Details on how to perform your own simulations are given in this answer record.
|(Xilinx Answer 57237)||Debugging||When a transceiver design is not working as intended, there are many factors to consider when looking for a solution.
This answer record will help guide you in that process.