We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 5706

FPGA/Design Compiler 1999.05 - Using SYNLIBS settings produces Warning UISN-26


Keywords: Synopsys, FPGA, Design, Compiler 1999.05, 1999.10, synlibs, UISN-26, link, synthetic

Urgency: Standard

General Description:
Beginning with Synopsys Compiler version 1999.05, the following warning may be seen while
reading in library files specified by the "SYNLIBS" program:

Warning: The following synthetic libraries should be added to the list of link libraries:
'xdw_spartanxl'. (UISN-26)

The library listed is in .sldb format and is normally listed only in the synthetic_library listing.


According to Synopsys, this warning can be safely ignored. However, to make the warning
disappear, simply add the specified .sldb synthetic library to the link_library listing. For a
Spartan-XL device, your libraries would look like this:

link_library = {xprim_s20xl-4.db xprim_spartanxl-4.db xgen_spartanxl.db xfpga_spartanxl-4.db
xio_spartanxl-4.db xdw_spartanxl.sldb} /* <---- the library is added here */
target_library = {xprim_s20xl-4.db xprim_spartanxl-4.db xgen_spartanxl.db xfpga_spartanxl-4.db
define_design_lib xdw_spartanxl -path
symbol_library = {spartanxl.sdb}
synthetic_library = {xdw_spartanxl.sldb standard.sldb}
AR# 5706
创建日期 02/18/1999
Last Updated 06/13/2002
状态 Archive
Type 综合文章