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AR# 57237

Xilinx HSSIO Solution Center - Design Assistant Serial Transceiver Debugging


Debugging serial transceiver problems can be challenging. Some advice is included in the Answer Records linked below to make it easier.

This is meant only as a supplement to the user guide which should be the main source of debugging information.

The following answer records cover the different sections of HSSIO debug. For a basic HSSIO debug checklist, please use the attached debug flowchart. The flowchart provides links to relevant Answer Records where applicable.

Note: This answer record is part of the Xilinx HSSIO Solution Center (Xilinx Answer 37181).

The Xilinx HSSIO Solution Center is available to address all questions related to HSSIO. Whether you are starting a new design or troubleshooting a problem, use the HSSIO Solution Center to guide you to the right information.


(Xilinx Answer 57737)Debugging Power and Attributes
(Xilinx Answer 57738)Debugging Reference Clock and Termination and Signal Integrity
(Xilinx Answer 57739)Debugging Comma detection and alignment, TX/RX Buffer or Buffer Bypass problems
(Xilinx Answer 57741)Debugging Channel Bonding or 8B/10B problems
(Xilinx Answer 57742)Debugging Clock and Data Recovery Problems
(Xilinx Answer 57743)Debugging Equalization and Margin problems
(Xilinx Answer 65469)Debugging Eye Scan problems
(Xilinx Answer 66807)Debugging Loopback problems
(Xilinx Answer 59435)Debugging Reset problems
(Xilinx Answer 65228)Debugging issue with putting 2 protocols in one Quad


文件名 文件大小 File Type
GT_Debug_Flowchart.pdf 300 KB PDF



Answer Number 问答标题 问题版本 已解决问题的版本
64092 Aurora Design Assistant - Hardware Debug N/A N/A
AR# 57237
日期 10/05/2016
状态 Active
Type 解决方案中心
  • Artix-7
  • Kintex-7
  • Virtex-5
  • More
  • Virtex UltraScale
  • Kintex UltraScale
  • Less