AR# 57561

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Example Design - Using the AXI DMA in polled mode to transfer data to memory

描述

Attached to this Answer Record is an Example Design for using the AXI DMA in polled mode to transfer data to memory.

解决方案

This design targets Zynq devices and uses a simple counter to drive the S2MM channel of the AXI DMA.

Counter data is sent into and then read out of memory, and is finally sent out of the MM2S channel to an AXI Streaming FIFO.

The data received by the AXI Streaming FIFO is verified against the counter data.

The ARM controls DMA transfers via GP ports by accessing the AXI DMA core through its AXI Lite interface.

It uses simple polling of the status register to manage DMA transfers.


For more details about the design, refer to the dma_ex_polled/doc directory.






The current version of this design was created in Vivado 2015.1.

附件

文件名 文件大小 File Type
dma_ex_polled_v2_1.zip 1 MB ZIP
simple_dma.xpr.zip 32 MB ZIP

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Answer Number 问答标题 问题版本 已解决问题的版本
57550 Example Designs - Designing with the AXI DMA core N/A N/A
AR# 57561
日期 05/18/2018
状态 Active
Type 综合文章
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