AR# 58555

Vivado IP Integrator - Example IP Integrator Designs Targeting Xilinx 7 Series Demo Boards


Attached to this answer record are example IP Integrator designs targeting the Xilinx 7 series demo boards. 

These are to be used for reference purposes to explore the Vivado IP Integrator tool, or as a base design for users designs.


To use these designs, download and unzip your preferred design below, and follow the instructions in the <Example Design>.docx file.

For further documentation and guidelines in using the IP Integrator, see the Vivado Embedded Design Hardware Guide.


文件名 文件大小 File Type 8 MB ZIP 7 MB ZIP 8 MB ZIP 9 MB ZIP 4 MB ZIP 4 MB ZIP 34 MB ZIP 30 MB ZIP 28 MB ZIP 31 MB ZIP
AR# 58555
日期 07/28/2014
状态 Active
Type 文档变更
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