AR# 58604

7 Series Integrated Block Wrapper for PCI Express v2.2 - External ports updated when upgrading the core from v2.0/v2.1 to v2.2

描述

Version Found: v2.2
Version Resolved and other Known Issues: See (Xilinx Answer 54643)

The following changes in the external ports are found, even though v2.2 is not a major version release, when upgrading the 7 Series Integrated Block Wrapper for PCI Express core from v2.0/v2.1 to v2.2 in 2013.3:

removed port 'conf_clk'
removed port 'icap_ceb_user'
removed port 'icap_wrb_user'
removed port 'icap_din_bs_user'
removed port 'icap_dout_user'
added port 'user_app_rdy'
added port 'startup_cfgclk'
added port 'startup_cfgmclk'
added port 'startup_eos'
added port 'startup_preq'
added port 'startup_clk'
added port 'startup_gsr'
added port 'startup_gts'
added port 'startup_keyclearb'
added port 'startup_pack'
added port 'startup_usrcclko'
added port 'startup_usrcclkts'
added port 'startup_usrdoneo'
added port 'startup_usrdonets'
added port 'icap_clk'
added port 'icap_csib'
added port 'icap_rdwrb'
added port 'icap_i'
added port 'icap_o'

解决方案

This is a known issue.

Users are advised to make sure they update the wrapper/supporting files accordingly to accommodate the above changes.

Note: "Version Found" refers to the version where the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Revision History
12/03/2012 - Initial release

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
54643 7 Series Integrated Block for PCI Express — Vivado 2013.1 及更新工具版本的发布说明及已知问题 N/A N/A
AR# 58604
日期 01/07/2014
状态 Active
Type 已知问题
IP