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AR# 58636

MIG 7 Series QDRII+/RLDRAMII/3 - All multi-controller designs fail VCS and IES simulations

描述

Version Found: v2.0 Rev2
Version Resolved: See (Xilinx Answer 54025)

All VCS and IES simulations will fail for MIG 7 Series QDRII+, RLDRAMII, and RLDRAM3 multi-controller designs. 

This is only an issue with multi-controller designs and Vivado and QuestaSim simulations work as expected.

解决方案

If a work-around is needed, please contact Xilinx Technical Support.

Revision History
12/18/2013 - Initial release

AR# 58636
日期 04/15/2014
状态 Active
Type 已知问题
器件
IP
的页面