AR# 59612

7-Series GTX - buffer bypass mode: how to correctly set the parameter PCS_RSVD_ATTR


This AR details some informationcurrently missing from the UG476 User Guide.

It explains the reason for unexpected simulation results in cases of incorrect GTX wizard 3.1 parameter setup.


When GTX buffer bypass mode is used, phase TX/RX alignment between XCLK and USRCLK domains is required before normal operation.

The TX or RX phase alignment procedure must be performed after any of the following:

  • After resetting or powering up the GTX transceiver TX/RX
  • After resetting or powering up the CPLL and/or QPLL.
  • After a change to the GTX transceiver reference clock source or frequency.
  • After a change to the TX/RX line rate.

Alignment can be achieved in two ways: Manual Mode and Auto Mode.

Auto Mode should be used for single lane cases.

When multilane alignment is required, Manual Mode should be used.

The following example integrates the User Guide information.

TX Single Lane Auto Mode
PCS_RSVD_ATTR[1] = '0'

TX Manual Mode
PCS_RSVD_ATTR[1] = '1'

RX Auto Mode
PCS_RSVD_ATTR[2] = '0'

RX Manual Mode
PCS_RSVD_ATTR[2] = '1'

GTX Wizard 3.1 incorrectly set  PCS_RSVD_ATTR[1] and [2] in the gtwizard_0_multi_gt file.

This prevents the phase alignment FSM from completing the alignment process.

AR# 59612
日期 05/22/2014
状态 Active
Type 综合文章