AR# 60126


MIG 7 Series QDRII+ - Verify Pin Out fails to verify CK placement rule for QDRII+ SRAM designs


Version Found: 2.0 Rev 3
Version Resolved: See (Xilinx Answer 54025)

UG586 states that K/K# clocks must be kept in the same bank as the write data bank and that they should be placed on a DQSCCIO pin pair for QDRII+ SRAM designs. 

However, verifying the pin out in the MIG GUI fails to validate this rule.



To ensure that this rule is not violated users must manually verify this requirement. 

If this rule is violated the design may fail during implementation. 

Revision History
04/16/2014 - Initial Release
AR# 60126
日期 07/01/2014
状态 Active
Type 已知问题
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