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AR# 60755

Zynq-7000 SoC – 2014.1 Boot failed when EMIO TPIU is enabled

描述

QSPI/SD booting fails when EMIO TPIU is enabled.

I enabled DEBUG_FSBL_INFO, but there is no message outputted.

Also JTAG cannot be connected via XMD.

Why does this happen and what is the work-around?

解决方案

When EMIO TPIU is enabled, external input clock can be select for TRACE_CLK by setting bit6 of DBG_CLK_CTRL.

However there is a limitation that PL must be powered and configured before setting the TPIU register.

During the QSPI/SD boot, FSBL switches TRACE_CLK to EMIO and after that it writes into the TPIU CurrentSize register (0xf8803004).

This causes the system to hang, because there is no active clock input to the Debug sub-system.

This register write is NOT necessary and the debugger can change the CurrentSize after the system is up and running.

To resolve this issue comment out the write to 0xf8803004 in the ps7_init.c file.

链接问答记录

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
46915 Zynq-7000 Debug - Setup the TRACE port via EMIO on the ZC702 board N/A N/A
AR# 60755
日期 06/13/2018
状态 Active
Type 综合文章
器件
  • Zynq-7000
Tools
  • Vivado Design Suite - 2014.1
Boards & Kits
  • Zynq-7000 SoC ZC702 Evaluation Kit
  • Zynq-7000 SoC ZC706 Evaluation Kit
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