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AR# 60952

MIG 7 Series - Pinout validation in Fixed Pinout Mode does not check against multiple controllers

描述

Version Found: MIG 7 Series v2.0 Rev 3
Version Resolved: See (Xilinx Answer 54025)

For multi-controller designs it is not possible to validate pinout across multiple controllers. 

This means when using the Fixed Pinout mode it is possible to place I/O for different controllers in the same bank and pass validation. 

This will cause errors during implementation and should be avoided.

解决方案

To prevent this from occurring pay careful attention when selecting pinout in Fixed Pinout mode and all Pinout requirements listed in UG586 should be strictly followed.

Revision History

06/05/2014 - Initial Release

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
41706 MIG 7 Series - Can FPGA banks be shared among memory interfaces? N/A N/A
54025 MIG 7 Series - IP Release Notes and Known Issues for Vivado N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
41706 MIG 7 Series - Can FPGA banks be shared among memory interfaces? N/A N/A
AR# 60952
日期 06/06/2014
状态 Active
Type 已知问题
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