AR# 61249

7 Series Integrated Block for PCI Express v3.0 (Rev2) - PIPE Simulation and External PIPE Interface options permanently disabled in RP mode

描述

Version Found: v3.0 (Rev2)
Version Resolved and other Known Issues: See (Xilinx Answer 54643)

When generating the 7 Series Integrated Block for PCI Express v3.0 (Rev2) core in RP mode, PIPE Simulation and External PIPE Interface options cannot be enabled.

This issue exists only in RP mode and not if the core is generated as an endpoint.

解决方案

This is a known issue and will be fixed in a future release of the core.

Note: "Version Found" refers to the version where the problem was first discovered. 

The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Revision History:
06/24/2014 - Initial Release   

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
54643 7 Series Integrated Block for PCI Express - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions N/A N/A
AR# 61249
日期 06/24/2014
状态 Active
Type 已知问题
IP