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AR# 613

5.2.1 XSIMMAKE - Does not support CLB or IOB primitives

解决方案




PROGRAM: XSIMMAKE

VERSION: 5.x

PLATFORM: Any

SHORT DESCRIPTION: Xsimmake doesn't support CLB or IOB primitives

LONG DESCRIPTION:

Neither the functional flow nor the timing flow of
Xsimmake supports designs containing CLB or IOB
primitives.

CAUSE:

This components have no models available for the simulator to use and therefore
require special preparation for simulation.

SOLUTION:

You must create an unrouted LCA file as the basis of your functional simulation
netlist. You need to run XNFPrep to generate an XTF file and XNFMAP to map the
XTF file into the logic and I/O ressources of the FPGA.

1. Enter the following from the command line:

xnfprep filename.xff
xnfmap filename.xtf

xnfmap generates a netlist mapped into CLBs, IOBs, BUFTs, and clock
buffers.

2. For XC2000 or XC3000 designs, run map2lca to generate an unrouted
LCA file:

map2lca filename.map

For XC3000A/L or XC3100A design:

ppr filename.xtf route=false placer_effort=1


3. Convert the LCA file into a Viewsim netlist (VSM) file:

lca2xnf -u filename.lca new_filename.xnf

4. Restore any signals names that changed during design processing:

xnfba filename[.xg,.xff] new_filename.xnf

xnfba requires two input files: the unrouted netlist (XFF or XG
file) and the routed XNF file created by lca2xnf.

5. Convert the Xilinx netlist back to a Viewlogic wirelist:

xnf2wir new_file.xnf

6. Convert the WIR subdirectory files into a Viewsim wirelist VSM file:

vsm new_filename.1

7. Execute VSMUPD:

vsmupd filename.vsm new_filename.vsm

Where filename is the unrouted VSM file, and new_filename is the
routed VSM file. vsmupd adds net equivalences to the VSM file for
the removed references, which facilitates a more complete
simulation.



AR# 613
创建日期 08/31/2007
Last Updated 03/22/2000
状态 Archive
Type ??????