AR# 615: Unbonded Fast Output Enable (FOE) can't be specified.
AR# 615
Unbonded Fast Output Enable (FOE) can't be specified.
Description
Both the XC7354pc44 and the XC7372pc68 have only one FOE pin (FOE0). The FOE1 I/O block is not connected to a package pin. Since FOE's can either be connected to a pin or internal logic, a user would expect that a FOE in an unbonded I/O block could be used for connecting to internal logic. While it is physically possible to use unbonded FOE's in unbonded I/O blocks in XEPLD's, currently there is no way to specify their use in any design entry method.
A future release of the XEPLD software will address this problem.
A workaround exists. (See Resolution 1 below)
1) Lock all the pins in the design.
2) Use the pinout tables in the Programmable Logic Data Book to map the design pinout onto a larger package. For example, pin 68 on a 7372pc68 would map to pin 84 on a 7372pc84.
3) Process the design and create a PRG file.
4) Edit the PRG file to change the part back to the smaller package. Change the second line of the PRG file:
XC7354pc44 :01FFFE0006FC XC7354pc68 :01FFFE0007FB
XC7372pc68 :01FFFE000AF8 XC7372pc84 :01FFFE000BF7
解决方案
This workaround relies on the fact that the PRG files for the same die are virtually identical, except for the package code at the beginning of the file.
1) Lock all the pins in the design.
2) Use the pinout tables in the Programmable Logic Data Book to map the design pinout onto a larger package. For example, pin 68 on a 7372pc68 would map to pin 84 on a 7372pc84.
3) Process the design using the larger package type and create a PRG file.
4) Edit the PRG file to change the part back to the smaller package. Change the second line of the PRG file: