AR# 61805


MIG 7 Series - LPDDR2 calibration fails in Phase Detection when memory operating frequency is 200MHZ


Version Found: MIG 7 Series v2.1
Version Resolved: See (Xilinx Answer 54025)

MIG 7 Series LPDDR2 designs running at 200MHz may see hardware failures during the Phase Detection stage of calibration. 

This is due to phase difference between the memory reference clock and DQS input strobe when they are at equal frequencies.

This makes edge detection unreliable.



If hardware failures are seen during the Phase Detection stage of calibration, increase the memory operating frequency to 220MHz or higher. 

This issue will be fixed in a future release of the IP.

Revision History

09/09/2014 - Initial Release



Answer Number 问答标题 问题版本 已解决问题的版本
54025 MIG 7 Series - IP Release Notes and Known Issues for Vivado N/A N/A
AR# 61805
日期 09/16/2014
状态 Active
Type 已知问题
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