Version Found: MIG 7 Series v2.3
A warning message similar to the following can be generated when upgrading a MIG 7 Series IP within a Vivado 2014.4 IPI block design that includes the usage of the additional MMCM output clocks:
This warning message is generated due to MMCM VCO frequency changes that were made along with the write calibration updates in MIG 7 Series v2.3.
A part of the write calibration changes is to include MMCM precise fine phase adjustments.
This requires M and D integer divide values.
Therefore, the VCO frequency change and affected available MMCM parameters can affect the available MMCM output frequencies.
Please see (Xilinx Answer 62368) for full details on the write calibration changes.
To work around this, select the closest clock frequency available in the MIG 7 Series GUI.