This Answer Record lists all known issues associated with the Kintex UltraScale FPGA KCU105 Evaluation Kit.
Board / Kit Related Issues
| (Xilinx Answer 37579) | Which device do I have on my Xilinx Evaluation Kit; is it an Engineering Sample (ES) or Production silicon? |
| (Xilinx Answer 61504) | Kintex UltraScale FPGA KCU105 Evaluation Kit - How do I identify the serial number of my KCU105? |
| (Xilinx Answer 61974) | Kintex UltraScale Evaluation Board KCU105 - Why do I see a Spartan3A DSP device in the chain when I initialize the JTAG chain? |
| (Xilinx Answer 63143) | Kintex UltraScale FPGA KCU105 Evaluation Kit KCU105 BIST link |
| (Xilinx Answer 62629) | UltraScale Boards and Kits - Maxim Integrated Power Solution dongle |
| (Xilinx Answer 63677) | Kintex UltraScale FPGA KCU105 Evaluation Kit KUConTRD01 Targeted Reference Design Release Notes and Known Issues Master Answer Record |
| (Xilinx Answer 63678) | Kintex UltraScale FPGA KCU105 Evaluation Kit KUConTRD02 Targeted Reference Design Release Notes and Known Issues Master Answer Record |
| (Xilinx Answer 63679) | Kintex UltraScale FPGA KCU105 Evaluation Kit KUConTRD03 Targeted Reference Design Release Notes and Known Issues Master Answer Record |
| (Xilinx Answer 63680) | Kintex UltraScale FPGA KCU105 Evaluation Kit KUConTRD04 Targeted Reference Design Release Notes and Known Issues Master Answer Record |
| (Xilinx Answer 65218) | Kintex UltraScale FPGA KCU105 Evaluation Kit - Reprogramming the Maxim Integrated Power Controllers |
| (Xilinx Answer 65236) | Xilinx UltraScale Boards and Kits - Maxim Integrated Power Solution |
| (Xilinx Answer 66337) | UltraScale Boards and Kits - Are the power supplies provided with UltraScale Boards and Kits interchangeable? |
| (Xilinx Answer 66419) | Kintex UltraScale FPGA KCU105 Evaluation Kit - PCB Revision Differences |
| (Xilinx Answer 66509) | 7 Series and UltraScale Kits - Interaction with ADI AD9625-2.5EBZ FMC card |
| (Xilinx Answer 66663) | Kintex UltraScale FPGA KCU105 Evaluation Kit - UltraScale RSA Authentication |
| (Xilinx Answer 66751) | Xilinx UltraScale Boards and Kits - Board thickness |
| (Xilinx Answer 66874) | Maxim Integrated Dongle - v2.00.1 Installer - Driver installation issue |
| (Xilinx Answer 67103) | UltraScale Boards and Kits - VADJ behavior and bring-up |
| (Xilinx Answer 67308) | Boards and Kits - UltraScale and UltraScale+ MPSoC Evaluation Kits - VADJ and the System Controller |
| (Xilinx Answer 67507) | Xilinx Boards and Kits - Power Supply Information |
Documentation Related Issues
| Answer Record | Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 69238) | Kintex UltraScale FPGA KCU105 Evaluation Kit - UG917 (v1.7) - Table 1-22 PMOD connector pinout incorrect | v1.7 | |
| (Xilinx Answer 64798) | KCU105 UG917 (v1.2.1), YCbCr 4:2:2 format data mapping | v1.2.1 | v1.3 |
| (Xilinx Answer 64771) | KCU105 UG917 (v1.2.1), MGT Quad 226 refclk description and Table 110 do not correlate | v1.2.1 | v1.3 |
| (Xilinx Answer 64250) | KCU105 UG917 (v1.1), Figure 122 shows pin 88 twice | v1.1 | v1.2 |
| (Xilinx Answer 64249) | KCU105 UG917 (v1.1), Table 117 "FPGA U1 to CP2105GM U34 Connections" is incorrect | v1.1 | v1.2 |
| (Xilinx Answer 63664) | Kintex UltraScale FPGA KCU105 Evaluation Kit UG917 (v1.0) Figure 122 incorrect "DE" pin listing | v1.0 | v1.1 |
| (Xilinx Answer 63574) | UG917 (v1.0) KCU105 Board User Guide XC7Z010 System Controller callout | v1.0 | v1.1 |
| (Xilinx Answer 63571) | UG917 (v1.0) KCU105 Board User Guide DIFF_TERM | v1.0 | v1.4 |
PCI Express / IP Related Issues
| (Xilinx Answer 58435) | MIG UltraScale IP Release Notes and Known Issues for Vivado 2014.1 and newer tool versions |
| (Xilinx Answer 58670) | 2013.4 Vivado IP Release Notes All IP Change Log Information |
| (Xilinx Answer 63596) | MIG UltraScale HOLD violations might be seen when using 2014.4.1 |
Design Tools Related Issues
| (Xilinx Answer 52787) | Vivado "ERROR: [Common 17143] Path length exceeds 260 Byte maximum allowed by Windows" |
| (Xilinx Answer 60026) | UltraScale FPGA Transceiver Wizard v1.2 Release Notes and Known Issues |
| (Xilinx Answer 66161) | UltraScale Evaluation Kit - KCU105 / VCU108 / VCU110 - Board Interface Test (BIT) requires full Vivado Design Edition installed to run correctly |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 67507 | Xilinx Boards and Kits - Power Supply Information | N/A | N/A |
| 37579 | Which device do I have on my Xilinx Evaluation Kit; is it an Engineering Sample (ES) or Production silicon? | N/A | N/A |
| 67308 | Boards and Kits - UltraScale and UltraScale+ MPSoC Evaluation Kits - VADJ and the System Controller | N/A | N/A |
| 69238 | Kintex UltraScale FPGA KCU105 Evaluation Kit - UG917 (v1.7) - Table 1-22 PMOD connector pinout incorrect | N/A | N/A |
| AR# 63175 | |
|---|---|
| 日期 | 06/07/2017 |
| 状态 | Active |
| Type | 版本说明 |
| Boards & Kits | |