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AR# 6330

VCS - How do I compile Xilinx simulation libraries for VCS? (Verilog)


General Description:

For VCS/VCSi, you might need to compile the HDL libraries before using them for design simulations. The advantages of the compiled approach are speed of execution and economy of memory.
AR# 6330
创建日期 08/21/2007
Last Updated 03/31/2012
状态 Archive
Type 综合文章