AR# 63628

Does Vivado Simulator support tracing of VHDL variables?


ISIM does not support tracing of VHDL variables.

Is this feature available in Vivado?


This feature is not yet supported. 

To confirm this behavior, you can run simulation for the attached test case by following the steps below:

xelab -vhdl my.vhd -debug all -s test
xsim test
add_wave -r /*

Vivado returns the following warning that VHDL variable tracing is not supported.

WARNING: Simulation object /test/line__51/vvv was not traceable in the design for the following reason:
Vivado Simulator does not yet support tracing of VHDL variables.


文件名 文件大小 File Type
my.vhd 1 KB VHD



Answer Number 问答标题 问题版本 已解决问题的版本
58880 Xilinx Simulation Solution Center - Design Assistant - Vivado Simulator - Waveform Database (.wcfg,.wdb etc). N/A N/A
AR# 63628
日期 04/08/2015
状态 Active
Type 综合文章