General Description: FPGA Express no longer requires conversion functions to convert from HEX or OCTAL values to std_logic_vectors. These functions are found in the STD_LOGIC_1164 library and the previous requirements are described in (Xilinx Solution 4376).
However, the use of these conversion functions will lead to a Synopsys error when checking syntax:
Error L29/C0 : #0 Error: C:/path/mydesign.vhd line 29 Expression is ambiguous. (VSS-501)
This error is most frequently seen after having upgraded from FPGA Express v2.x to v3.x.
Remove the explicit call to the conversion function. For example:
dout <= to_stdlogicvector(X"F0");
should be edited to simply:
dout <= (X"F0");
The parenthesis are optional, but are okay to leave in. This will allow users to globally search and replace the offending conversion function. "To_X01" is another such conversion.