AR# 64056


2015.1 Vivado compile_simlib - How to compile Legacy ISE Simulation Libraries with Vivado?


Currently only 7 Series and beyond are supported in Vivado.

Xilinx Customers are using more and more complex systems involving multiple FPGA architectures spanning from 7 Series/UltraScale to Legacy devices.

compile_simlib, which is our Simulation Library Compilation Tool has a feature to enable easy compilation of Legacy Libraries (6 series and older devices) along with the current 7 series and UltraScale libraries.
This Answer Record documents this feature and its usage in detail.


compile_simlib has a switch called -ise_install_path which can be used to compile Legacy Simulation libraries with Vivado.
This enables system level simulation which involves Legacy Libraries (6 series and older devices) along with the latest set of devices.
This switch is currently HIDDEN and has to be used in command line mode.
Libraries compiled:
*  SecureIP    
*  UNISIM (VHDL & Verilog)     
*  UNIMACRO (VHDL & Verilog)    
*  SIMPRIM (VHDL & Verilog) 
Legacy EDK Libraries and Xilinxcorelib Simulation Libraries are not compiled in this method.

Include ISE simulation library from this path for compiling legacy architectures  (<Path>/ISE_DS/ISE)

Vivado% compile_simlib -ise_install_path <path>/ISE_DS/ISE -simulator questa

Compilation Log:

INFO: [Vivado 12-4261] Building system simulation library for all device architectures (this may take a while...please wait)
 > extracting components..............success
 > processing components.............success
 > generating component files.......success
INFO: [Vivado 12-4262] Built system library (Directory:<PWD>/./.Xil/Vivado-7174-xhdl2195/cxl/data)
Compiling system libraries for 'questasim' simulator in '<PWD>.'
Creating modelsim.ini file...



Answer Number 问答标题 问题版本 已解决问题的版本
58972 Does Vivado support system level simulation by providing simulation libraries for both 7 series and older devices? N/A N/A
AR# 64056
日期 04/30/2015
状态 Active
Type 综合文章
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