AR# 64773

MIG UltraScale DDR4/DDR3 - customization GUI shows incorrect Enable Chip Select Pin option when recustomizing IP

描述

Version Found: MIG UltraScale v7.0
Version Resolved: See (Xilinx Answer 58435)

MIG UltraScale DDR4 and DDR3 IP designs have an "Enable Chip Select Pin" option in the customization GUI which enables or disables generation and use of the Chip Select Pin. 

If this option is disabled and the MIG IP is generated, when the IP is customized again the GUI incorrectly shows that Chip Select is Enabled. 


解决方案

This is only an issue with the MIG customization GUI as the MIG IP generates correctly and has Chip Select Disabled.

However, if Chip Select needs to be enabled again, you must first uncheck (disable) the Chip Select Pin option and then enable it again.


Revision History:

06/30/2015 - Initial Release

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
58435 MIG UltraScale - IP Release Notes and Known Issues for Vivado 2014.1 and newer tool versions N/A N/A
AR# 64773
日期 06/30/2015
状态 Active
Type 已知问题
器件
IP