Quick successive error injections into unrelated or non-essential configuration memory can cause errors on a design's I/O interface (for example, increased bit error rate on a GT interface or any high speed memory interface).
The Soft Error Mitigation (SEM) IP's error injection feature is a tool provided to test the resiliency of the design and to emulate the design's behavior when a real soft error occurs.
An Increased error rate on I/O interfaces when SEM IP is used to perform frequent error injections might be an indication that the design's jitter budget is insufficient or too tight.
Please verify that you are following the recommended clocking schemes and other design guidelines to minimize the jitter in the design.
For more error injection guidance:
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
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63609 | UltraScale and UltraScale+ Soft Error Mitigation Controller - Release Notes | N/A | N/A |
54642 | Soft Error Mitigation IP Core - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions | N/A | N/A |
AR# 65402 | |
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日期 | 05/24/2018 |
状态 | Active |
Type | 综合文章 |
器件 |