2. 技术支持
  3. AR# 6556: V2.1i COREGEN, VERILOG, VHDL: New HDL behavioral simulation flow does not generate .VHD and .V models for simulation
  4. AR# 65562: LogiCORE IP Video Processing Subsystem (VPSS) v2.0, Software Driver v2.2 - Why does the output color rate not update correctly when using the Color Space Conversion feature?

AR# 65562

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LogiCORE IP Video Processing Subsystem (VPSS) v2.0, Software Driver v2.2 - Why does the output color rate not update correctly when using the Color Space Conversion feature?

描述

Why does the output color rate not update correctly when using the XVprocSs_SetPictureColorRange() API of the Color Space Conversion feature?

解决方案

This is a known issue in the Horizontal Scaler sub-driver of the Video Processing Subsystem Software Driver v2.2 in Vivado 2017.4 and 2018.1.

This issue is resolved in the Video Processing Subsystem Software Driver Vivado 2018.2 and later.

  • Vivado 2017.3 and 2018.1 - Users can download the Video Processing Subsystem Software Driver Patch from (Xilinx Answer 67186) to work around this issue.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
67186 2017.4 and 2018.1 LogiCORE IP Video Processing Subsystem, Software Driver v2.2 - Video Processing Subsystem Software Driver v2.2 Patch Download N/A N/A
AR# 65562
日期 06/07/2018
状态 Active
Type 综合文章
IP
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